Systems requiring Linux kernel bypass can now offload server cycles to FPGA gates

AUBURN, NH – Atomic Rules, a reconfigurable computing IP firm, is pleased to announce the launch of Arkville, a DPDK-aware FPGA/GPP data mover enabling Linux DPDK applications to offload server cycles to FPGA gates.

“Our Arkville launch brings five man-years of DPDK-first passion to market,” said Shepard Siegel, CTO of Atomic Rules. “By introducing Arkville, Atomic Rules is enabling Linux DPDK applications that seek acceleration in a software-first fashion to offload server cycles to FPGA gates. This allows project managers to bring their product to market faster and focus on differentiating their product by not having to re-invent a GPP/FPGA packet mover.”

Arkville is a combination of a DPDK PMD that runs on a GPP and an RTL IP Core that runs on an FPGA. Using industry-standard AXI interfaces on the FPGA side and DPDK interfaces on the software API/ABI side, Arkville provides an exceptional “out-of-the-box” solution for both hardware and software teams.

Learn more: Arkville DPDK-aware FPGA/GPP data mover

Atomic Rules Arkville IP core operates at any line rate, including 1/5/10/25/40/50/100/400 GbE, and works with most popular, high-performance FPGAs. Atomic Rules has contributed the Arkville Poll Mode Driver (PMD) code to the DPDK Project of The Linux Foundation under the terms of the BSD 3-Clause open source license. Arkville achieves up to 150 Gbps and 120 Mpps with a contemporary PCIe Gen3x16 interface, and is also Gen4 Ready. Because Arkville was designed with the specific goal of accelerating and empowering DPDK, the performance is significantly higher than one of a naïve DMA implementation on an FPGA.

Industry Support For Arkville

“We are pleased to now offer Arkville as an IP core to our FPGA board customers in addition to already using it as the PCIe data mover in our new Stream family of network products,” said Craig Lund, Vice President of Network Products at BittWare. “We’ve noted early interest in Arkville as it fits with a wide range of applications.”

“We were impressed at how easily Arkville ported on our product, and are pleased that Atomic Rules is offering a DPDK solution available to our customers”, said Adam Smith, CEO at Alpha Data Inc. “We believe offloading server cycles to FPGA gates opens the door to new opportunities for systems requiring Linux kernel bypass.”

Community Support

“Since April, the DPDK community and The Linux Foundation have worked to establish a governance structure for the DPDK Project to nurture a vibrant and open community” said Mike Woster, COO at The Linux Foundation “Atomic Rules’s launch of Arkville is a good example of how an open governance structure can help foster open innovation.”

Arkville IP Core Pricing and Availability

The Atomic Rules Arkville DPDK-aware FPGA/GPP data mover IP core is available for purchase. Arkville includes 1×100 GbE and 4×10 GbE examples as starting points for development. Contact us for pricing information.

About Atomic Rules

Atomic Rules is an electrical engineering consultancy providing its clients with effective solutions to problems involving interconnection networks and reconfigurable computing. Their practice employs scalable, rule-based methods to tackle complex concurrency among heterogeneous processors. Atomic Rules understands the limitations of composing complex processor interactions using conventional RTL methods. To address this challenge, they use tools and techniques inspired by functional programming. Beyond RTLs, they specialize in creating source codes written in Bluespec SystemVerilog, a vehicle for code correctness, portability and reuse. Atomic Rules provides its clients with expert SoC/FPGA competencies that build upon RTL/ESL design and verification techniques – not reinvent them. For more information, visit

About Alpha Data

Established in 1993, Alpha Data is a world leader in high performance Xilinx FPGA based plug-in acceleration boards for Data Center and high-performance computing applications including video processing, machine learning, and network acceleration. Alpha Data’s low-cost, power-efficient accelerators leverage Xilinx’s All Programmable FPGAs and the SDAccel development environment for Open CL, C and C++ to accelerate processing, increase data throughput, and deliver power optimized solutions for computing clusters. Designed to be server-friendly for large scale data center deployment, Alpha Data’s range of FPGA accelerator boards are all in a low-profile PCIe format with passive cooling. Alpha Data’s high-reliability hardware platforms are ideal for development as well as full-scale production deployment. For more information on Alpha Data, visit

About BittWare

Since 1989, BittWare has designed and manufactured high-end computing solutions for the most demanding government and commercial applications. Today, BittWare’s FPGA PCIe boards target high-performance users who need 100G networking (such as on our Xilinx UltraScale+ boards), OpenCL support (such as with our A10PL4 with an Intel Arria 10), and memory options, including 256GB DDR4, QDR-II+, and Hybrid Memory Cube. Low-profile and full-size boards with active or passive cooling are available, along with a range of enclosures, software tools, and IP cores. For customers with custom needs, our ODM solutions leverage BittWare’s extensive design experience and top manufacturing partnerships. Learn more at .


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